Desarrollo de un sistema distribuido en SOC-FPGA para el control de un actuador robótico con interfaz IIC en conjunto con la Universidad de Brasilia – Brasil.

Abstract

In this thesis work, the work carried out in the research internship at the University of Brasilia - Brazil is exposed, as well as the how also of the agreement made between the University of Pamplona and the University of Brasilia. Additional enhanced works will also be exhibited. In the development of the main basis of the thesis we begin with the construction of a new robotic actuator composed of motor driver, position sensors, current sensors and an IIC communication module that will be controller through a control system based on modules that work In parallel also called chip system (SoC) implemented an FPGA card, the robotic actuator is addressed to be part of a new robotic hand design with better functionality and more degrees of freedom. Secondary activities will also be developed, such as attendance at classes of Bio-inspired systems that focus on activities such as participation in conferences and the publication of scientific articles in indexed journals. The robotic actuator will be developed from different manufacturing techniques, from CAD/CAM of electronic and mechanical design using rapid plate prototyping equipment for SMK electronic components of LPKF protomat and 3D printers available in the laboratories of the university campus of UNB e IFB in Brasilia, The controller of this system will be developed in an Xilinx SoC-FPGA on the Zybo development board with Zynq-7010 chipset that is composed of an ARM Dual-Core Cortex A9 processor that allows you to program processes in parallel in your VHDL or Verilog programming environment. The advantage of working in these types of environments is that the robotic actuator can be controlled in parallel. This translates the ability to control several actuators at the same time with a single chip, allowing processing times to produce more computational expense, however this problem can also be addressed and analyzed to develop the process with the lowest possible computational expense and that has a high speed in the execution of the process.